Process development of a maskless N40 via level for security application with multi-beam lithography

Isabelle Servin; Patricia Pimenta-Barros; Arthur Bernadac; Jonathan Pradelles; Allan Germain; Yoann Blancquaert; Philippe Essomba; Stefan Landis; Gerard ten Berge; Marco Wieland; Philippe Brun

doi:10.1117/12.2297162

19 March 2018 Process development of a maskless N40 via level for security application with multi-beam lithography

Isabelle Servin, Patricia Pimenta-Barros, Arthur Bernadac, Jonathan Pradelles, Allan Germain, Yoann Blancquaert, Philippe Essomba, Stefan Landis, Gerard ten Berge, Marco Wieland, Philippe Brun

Author Affiliations +

Proceedings Volume 10584, Novel Patterning Technologies 2018; 1058411 (2018) https://doi.org/10.1117/12.2297162
Event: SPIE Advanced Lithography, 2018, San Jose, California, United States

Abstract

The maskless electron beam lithography system, based on massively parallel electron-beam writing strategy has the ability for low-cost production of truly unique individual chips in volume manufacturing, compatible with optical systems. Mapper Lithography has introduced the FLX-1200 platform installed at CEA-Leti. This paper will present fully process-integration stepwise developments to be compliant with the single via layer demanding targets based on dual damascene process:

The lithographic performances and etch transfer optimization were firstly evaluated on a layer stack representative of N40 CMOS technology by developing step-by-step approach:

- 1/ Trilayer lithography of via layer and partial etch into low-k development with VSB 50kV

- 2/ Litho/etch process of product wafer with VSB 50keV

- 3/ Trilayer lithography of via pattern and etch into low-k for FLX-1200 multi-beam 5kV

- 4/ last litho of via pattern on product wafer using FLX (no etch yet). In addition, the overlay and CDU capability of FLX-1200 are assessed for via 3, and the alignment to product wafer is tested.

Via patterning integration showing the up-to-date achievements is mature enough to start first customer demos for security application.

Conference Presentation

Citation Download Citation

Isabelle Servin, Patricia Pimenta-Barros, Arthur Bernadac, Jonathan Pradelles, Allan Germain, Yoann Blancquaert, Philippe Essomba, Stefan Landis, Gerard ten Berge, Marco Wieland, and Philippe Brun "Process development of a maskless N40 via level for security application with multi-beam lithography", Proc. SPIE 10584, Novel Patterning Technologies 2018, 1058411 (19 March 2018); https://doi.org/10.1117/12.2297162

ACCESS THE FULL ARTICLE

INSTITUTIONAL
Select your institution to access the SPIE Digital Library.

SELECT YOUR INSTITUTION

PERSONAL
Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.

PERSONAL SIGN IN

No SPIE Account? Create one

PURCHASE THIS CONTENT

SUBSCRIBE TO DIGITAL LIBRARY

50 downloads per 1-year subscription

Members: $195

Non-members: $335 ADD TO CART

25 downloads per 1 - year subscription

Members: $145

Non-members: $250 ADD TO CART

PURCHASE SINGLE ARTICLE

Includes PDF, HTML & Video, when available