Paper
20 March 2018 Exploration of BEOL line-space patterning options at 12 nm half-pitch and below
Author Affiliations +
Abstract
While the semiconductor industry is almost ready for high-volume manufacturing of the 7 nm technology node, research centers are defining and troubleshooting the patterning options for the 5 nm technology node (N5) and below. The target dimension for imec’s N5 BEOL applications is 20-24 nm Metal Pitch (MP), which requires Self-Aligned multiple (Double/Quadruple/Octuple) Patterning approaches (SAxP) in combination with EUV or immersion lithography at 193 nm. There are numerous technical challenges to enable gratings at the hard mask level such as good uniformity across wafer, low line edge/width roughness (LER/LWR), large process window, and all of this at low cost. An even greater challenge is to transfer these gratings into the dielectric material at such critical dimensions, where increased line edge roughness, line wiggling and even pattern collapse can be expected for materials with small mechanical stability such as highly porous low-k dielectrics. In this work we first compare three different patterning options for 12 nm half-pitch gratings at the hard mask level: EUV-based SADP and 193i-based SAQP and SAOP. This comparison will be based on process window, line edge/width roughness and cost. Next, the transfer of 12 nm line/space gratings in the dielectric material is discussed and presented. The LER of the dielectric lines is investigated as a function of the dielectric material, the trench depth, and the stress in the sacrificial hard mask. Finally, we elaborate on the different options to enable scaling down from 24 nm MP to 16 nm MP, and demonstrate 8 nm line/space gratings with 193i-based SAOP.
© (2018) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
S. Decoster, F. Lazzarino, L. Petersen Barbosa Lima, W. Li, J. Versluijs, S. Halder, A. Mallik, and G. Murdoch "Exploration of BEOL line-space patterning options at 12 nm half-pitch and below", Proc. SPIE 10589, Advanced Etch Technology for Nanopatterning VII, 105890E (20 March 2018); https://doi.org/10.1117/12.2297183
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KEYWORDS
Dielectrics

Line edge roughness

Scanning electron microscopy

Etching

Photoresist materials

Metals

Oxides

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