Paper
25 July 1989 Automatic Creation of Stepper Job Files
David S. Dailor
Author Affiliations +
Abstract
Application Specific Integrated Circuit (ASIC) manufacturing, characterized by fast cycle time, small lot sizes and an abundance of products and process flows, creates challenges not found in a dedicated product line. The continuous addition of new devices into the wafer fab creates problems such as reticle storage, critical dimensions specifications and stepper set-up. One of the stepper set-up problems is stepper job file generation. Each device run on a stepper requires several job files to be created. The number of job files created for each device is dependent on the manufacturing environment, the alignment scheme, process flow and stepper used. There can be as many job files as there are layers for each device. Data from the reticle layout engineer is entered into the stepper by the process engineer to define the stepping array, location of alignment marks, framing blade settings and other exposure related information. This process is time consuming and removes a machine from production while job files are being written and tested. In an ASIC environment where several new devices start each week, creating stepper job files is a major problem impacting: productivity, cycle time, process yield and the rework rate. A solution to all of these problems: automate the stepper job file generation process. Our stepper job files are created automatically by computer when the reticles are tooled. Stepper job files are ready before the masks arrive and they are always correct. The result is improved productivity and process yields with reduced reworks and prototype cycle times. A description of this automated approach and the necessary items to implement this technique is presented.
© (1989) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
David S. Dailor "Automatic Creation of Stepper Job Files", Proc. SPIE 1088, Optical/Laser Microlithography II, (25 July 1989); https://doi.org/10.1117/12.953156
Advertisement
Advertisement
RIGHTS & PERMISSIONS
Get copyright permission  Get copyright permission on Copyright Marketplace
KEYWORDS
Reticles

Semiconducting wafers

Optical alignment

Manufacturing

Prototyping

Very large scale integration

Process engineering

RELATED CONTENT

E-beam direct write is free
Proceedings of SPIE (October 30 2007)
A New Step By Step Aligner For Very Large Scale...
Proceedings of SPIE (September 05 1980)
True reticle cost saving by multi level reticle approach
Proceedings of SPIE (October 17 2008)

Back to Top