Paper
20 November 2019 Low cost test system for silicon photonics testing
Author Affiliations +
Abstract
IMECAS is developing a silicon photonics process platform based on existing 22nm CMOS platform. Developing this platform requires continuous process optimization and design verification, so the wafer-level test solution presented in this paper plays an extremely important role in process validation and optimization. We design a test station which enables manual and semi-automatic for optical and electro-optical testing of passive and active silicon photonics components and circuits, including waveguides, grating couplers, splitter, photo-detectors, modulators etc. It is compatible with 200mm wafer-level testing and Die-level testing. Meanwhile, it has two coupling ways: horizontal coupling and vertical coupling. The measured repeatability of S-parameters and IV is within 6α.
© (2019) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Peng Zhang, Bo Tang, Bin Li, Yan Yang, Ruonan Liu, TingTing Li, Zhihua Li, and Fujiang Lin "Low cost test system for silicon photonics testing", Proc. SPIE 11192, Real-time Photonic Measurements, Data Management, and Processing IV, 1119210 (20 November 2019); https://doi.org/10.1117/12.2537170
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KEYWORDS
Silicon photonics

Wafer testing

Active optics

Electro optics

Electro-optic testing

Modulators

Optical design

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