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The silicon-based gate-controlled lateral thyristor (GC-LT) which takes advantage of high sensitivity at low-lever light intensity is investigated by numerical simulation. The novel gate-controlled lateral thyristor structure is designed with sidewall control gates and base contacts. An operation method of using appropriate gate bias and base bias is proposed to safely establish a dynamic sampling mode. The relationship of the time to trigger and switch the detector on and the light intensities is quantified analytically. Simulation results show that the gated-controlled lateral thyrisor has a high sensitivity to extremely low-lever light intensities such as 1×10-9 W/cm2 at VG1=0.6V due to the coupling cycle amplification between cross-coupled bipolar transistors inside the structure.
Keyang Sun andLiyang Pan
"Low-lever light detection scheme based on the novel gate-controlled lateral thyristor", Proc. SPIE 11763, Seventh Symposium on Novel Photoelectronic Detection Technology and Applications, 11763AB (12 March 2021); https://doi.org/10.1117/12.2588548
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Keyang Sun, Liyang Pan, "Low-lever light detection scheme based on the novel gate-controlled lateral thyristor," Proc. SPIE 11763, Seventh Symposium on Novel Photoelectronic Detection Technology and Applications, 11763AB (12 March 2021); https://doi.org/10.1117/12.2588548