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30 January 2022 Modification of bounded J-Ramp method to monitor reliability and charge degradation of gate dielectric of MIS devices
Dmitrii V. Andreev, Vladimir M. Maslovsky, Vladimir V. Andreev, Alexander A. Stolyarov
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Proceedings Volume 12157, International Conference on Micro- and Nano-Electronics 2021; 121571M (2022) https://doi.org/10.1117/12.2623812
Event: International Conference on Micro- and Nano-Electronics 2021, 2021, Zvenigorod, Russian Federation
Abstract
This paper suggests a novel method to control quality and reliability of thin dielectric films of the gate dielectric of MIS structures. The proposed method is based on a modification of bounded J-Ramp. This technique, besides the control of charge injected into the gate dielectric until its breakdown, gives a capability to monitor a change of charge state of the gate dielectric during all the test procedure. In order to implement this, after ending of a test (current) step we switch the test current to the measurement current level (Jm) for a short time period and this allows to monitor the voltage change across MIS structure at the constant measurement current density. The current density Jm is chosen to meet the condition that at this level a s significant charge degradation of the dielectric should not be observed. Besides, the switches to measurement level should not greatly influence on bounded J-ramp test procedure. The modified J-ramp method proposes to monitor amount of injected charge, at which irreversible degradation of MIS device characteristics takes place (Qdeg), and evaluate reliability of the dielectric film on the basis of statistical measurements of these quantities.
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Dmitrii V. Andreev, Vladimir M. Maslovsky, Vladimir V. Andreev, and Alexander A. Stolyarov "Modification of bounded J-Ramp method to monitor reliability and charge degradation of gate dielectric of MIS devices", Proc. SPIE 12157, International Conference on Micro- and Nano-Electronics 2021, 121571M (30 January 2022); https://doi.org/10.1117/12.2623812
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KEYWORDS
Dielectrics
Reliability
Semiconducting wafers
Silicon
Dielectric breakdown
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