Presentation + Paper
1 December 2022 Early defect detection for EUV self-aligned litho-etch litho-etch patterning with EPE
Roy Anunciado, Jisun Lee, Ellaheh Barzegar, Stefan van der Sanden, Guillaume Schelcher, Stijn Schoofs
Author Affiliations +
Abstract
We demonstrate the use of EPE (Edge Placement Error) as an early defect detection metric in an EUV self-aligned lithoetch-litho-etch (eSALELE) patterning process. Pitch 21nm test structures were investigated on an eSALELE flow consisting of 4 EUV exposures, 2 of which are lines-spaces while the other 2 exposures are for block patterns that defines the tip-to-tip. An HMI eP5 SEM with large field-of-view (8x8µm FOV) was used to measure critical dimension (CD) on wafer at each critical processing step while the overlay between multiple exposures were measured optically on uDBO marks using a YieldStar (YS). On top of CD metrology, patterning defects were measured at the final patterning transfer into dielectric material using an eP5 SEM and built-in defect inspection capability. Line-break defects are reported. Although each metric like CD, LWR or OVL is expected to contribute to the defect performance of the final pattern transfer, using only one information or another is not fully descriptive. Combining these information into an EPE metric on this complicated patterning process showed better correlation to the defect rates at dielectric transfer.
Conference Presentation
© (2022) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Roy Anunciado, Jisun Lee, Ellaheh Barzegar, Stefan van der Sanden, Guillaume Schelcher, and Stijn Schoofs "Early defect detection for EUV self-aligned litho-etch litho-etch patterning with EPE", Proc. SPIE 12292, International Conference on Extreme Ultraviolet Lithography 2022, 122920J (1 December 2022); https://doi.org/10.1117/12.2637772
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KEYWORDS
Line edge roughness

Etching

Semiconducting wafers

Critical dimension metrology

Optical lithography

Amorphous silicon

Dielectrics

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