Heterogeneous computer architecture for embedded real-time image interpretation

Jeremy A. Salinger

doi:10.1117/12.161439

20 October 1993 Heterogeneous computer architecture for embedded real-time image interpretation

Jeremy A. Salinger

Proceedings Volume 1957, Architecture, Hardware, and Forward-Looking Infrared Issues in Automatic Target Recognition; (1993) https://doi.org/10.1117/12.161439
Event: Optical Engineering and Photonics in Aerospace Sensing, 1993, Orlando, FL, United States

Abstract

A heterogeneous parallel-processing computer architecture is being developed for embedded real-time interpretation of images and other data collected from sensors on mobile platforms. The Advanced Target Cueing and Recognition Engine (ATCURE) architecture includes specialized subsystems for input/output, image processing, numeric processing, and symbolic processing. Different specialization is provided for each subsystem to exploit distinctive demands for data storage, data representation, mixes of operations, and program control structures. The characteristics of each subsystem are described, with the Image Processing Subsystem (IPS) used to illustrate how the design is driven by careful analysis of current and projected computational requirements from many applications. These considerations led to a programming model for the Image Processing Subsystem in which images and their subsets are the fundamental unit of data. The processor implementation incorporates a scalable synchronous pipeline of processing elements that eliminates many of the bottlenecks found in MIMD and SIMD architectures.

Citation Download Citation

Jeremy A. Salinger "Heterogeneous computer architecture for embedded real-time image interpretation", Proc. SPIE 1957, Architecture, Hardware, and Forward-Looking Infrared Issues in Automatic Target Recognition, (20 October 1993); https://doi.org/10.1117/12.161439

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