Enhanced interprocessor communication strategies for parallel TMS320C40 digital signal processor systems

David Andrew Hartley; David Mark Harvey

doi:10.1117/12.160460

1 November 1993 Enhanced interprocessor communication strategies for parallel TMS320C40 digital signal processor systems

David Andrew Hartley, David Mark Harvey

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Proceedings Volume 2027, Advanced Signal Processing Algorithms, Architectures, and Implementations IV; (1993) https://doi.org/10.1117/12.160460
Event: SPIE's 1993 International Symposium on Optics, Imaging, and Instrumentation, 1993, San Diego, CA, United States

Abstract

The Texas Instruments' TMS320C40 digital signal processor contains communication hardware which enables processors to be connected together to form multiprocessing systems. Analysis of the devices communication channels suggests that it would be beneficial to use additional communication hardware to maximize system performance. The use of mesh routing chips in conjunction with the processors has been investigated. The two devices are interfaced using two TMS320C40 communication channels. Lower message latencies can be achieved by using TMS320C40 communication channels to perform nearest neighbor communications while using the routing chips to perform all other message routing. However, the use of additional TMS320C40 channels can degrade the rate at which packets are injected and consumed from the network, resulting in under utilization of the network bandwidth.

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David Andrew Hartley and David Mark Harvey "Enhanced interprocessor communication strategies for parallel TMS320C40 digital signal processor systems", Proc. SPIE 2027, Advanced Signal Processing Algorithms, Architectures, and Implementations IV, (1 November 1993); https://doi.org/10.1117/12.160460

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KEYWORDS

Telecommunications

Signal processing

Data communications

Digital signal processing

Systems modeling

Computer simulations

Data processing

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