Paper
9 September 1994 Planar multilevel metallization technologies for ULSI devices
Zheng Xu, Ken Ngan, Jim VanGogh, Rod Mosely, Yoichiro Tanaka, H. Kieu, Fusen E. Chen, Ivo J. Raaijmakers
Author Affiliations +
Abstract
Technologies are described which can completely fill contacts, vias and trenches with a PVD or CVD barrier metal film and a PVD Al-Cu plug. The presented processes are demonstrated to be applicable for contacts or vias having sizes down to 0.25 micrometers and aspect ratios of up to 5.
© (1994) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Zheng Xu, Ken Ngan, Jim VanGogh, Rod Mosely, Yoichiro Tanaka, H. Kieu, Fusen E. Chen, and Ivo J. Raaijmakers "Planar multilevel metallization technologies for ULSI devices", Proc. SPIE 2335, Microelectronics Technology and Process Integration, (9 September 1994); https://doi.org/10.1117/12.186046
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CITATIONS
Cited by 2 scholarly publications.
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KEYWORDS
Aluminum

Tin

Metals

Semiconducting wafers

Chemical vapor deposition

Resistance

Annealing

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