High-level design methodology for the implementation of image processing ASICs

Mohamed A. Wahab; Iain W. Shewring; S. John Rees

doi:10.1117/12.233315

27 February 1996 High-level design methodology for the implementation of image processing ASICs

Mohamed A. Wahab, Iain W. Shewring, S. John Rees

Proceedings Volume 2727, Visual Communications and Image Processing '96; (1996) https://doi.org/10.1117/12.233315
Event: Visual Communications and Image Processing '96, 1996, Orlando, FL, United States

Abstract

This paper presents an integrated design methodology for the development of high-level image processing algorithms and their ASIC implementation. A commercially available DSP development system is utilized to implement this strategy. A 2-D DCT algorithm is used as an example to illustrate the smooth transition between high-level algorithm development and hardware synthesis.

Citation Download Citation

Mohamed A. Wahab, Iain W. Shewring, and S. John Rees "High-level design methodology for the implementation of image processing ASICs", Proc. SPIE 2727, Visual Communications and Image Processing '96, (27 February 1996); https://doi.org/10.1117/12.233315

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