Paper
27 August 1997 Hot-carrier degradation for deep-submicron N-MOSFETs introduced by back-end processing
Donald Y. C. Lie, Wei Xia, Jiro Yota, Atul B. Joshi, R. Zwingman, R. Williams, V. Kerametlian, Dennis Cerney, Byoung Woon Min, Dim-Lee Kwong
Author Affiliations +
Abstract
Severe hot-carrier-induced device lifetime degradation has been observed on deep submicron N-MOSFETs after they are processed through the backend for multi-layer-metal interconnect. Our experimental data show that the hot-carrier lifetime degradation is dependent on: (1) H2 annealing/sintering time; (2) choice of inter-metal-dielectric process, i.e., spin-on-glass (SOG) or high-density-plasma chemical-vapor-deposition (HDP-CVD) process; and (3) choice of pre-metal-dielectric process, i.e., BPSG (borophosphosilicate glass) or BPTEOS/O3 (borophosphosilicate-tetra-ethoxy- silane and ozone oxide) deposition. The device hot-carrier lifetime can degrade more than 50% due to prolonged H2 sintering time, and it could easily degrade by a order of magnitude when HDP-CVD oxide, instead of SOG, is used for inter-metal dielectric deposition. The gate oxide always remains of excellent quality through the entire backend processing, which indicate that the degradation is not caused by plasma damage to the gate oxide but by hydrogen-related defects at the Si-SiO2 interface instead.
© (1997) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Donald Y. C. Lie, Wei Xia, Jiro Yota, Atul B. Joshi, R. Zwingman, R. Williams, V. Kerametlian, Dennis Cerney, Byoung Woon Min, and Dim-Lee Kwong "Hot-carrier degradation for deep-submicron N-MOSFETs introduced by back-end processing", Proc. SPIE 3212, Microelectronic Device Technology, (27 August 1997); https://doi.org/10.1117/12.284599
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Cited by 3 scholarly publications.
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KEYWORDS
Semiconducting wafers

Oxides

Metals

Interfaces

Solids

Annealing

Field effect transistors

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