Paper
28 December 1998 Packed binary representations for fast motion estimation on general-purpose architectures
Sriram Sethuraman, Ravi Krishnamurthy
Author Affiliations +
Proceedings Volume 3653, Visual Communications and Image Processing '99; (1998) https://doi.org/10.1117/12.334691
Event: Electronic Imaging '99, 1999, San Jose, CA, United States
Abstract
Reduced representations have been used to decrease the memory bandwidth requirements of fast motion estimation schemes. Usually, this is achieved on special-purpose architectures that exploit the reduced representations to do several distortion calculations in parallel. In this paper, we present a generic fast implementation that its suitable for various general-purpose architectures. The algorithm uses a novel data structure that is based on packing and 'overlapping' the reduced representation data into the native word size of the processor. Efficient motion estimation schemes to minimize the memory bandwidth between the processor and cache by exploiting this data structure are developed. These schemes can be tailored with ease to suit different general-purpose processors and media processors.
© (1998) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Sriram Sethuraman and Ravi Krishnamurthy "Packed binary representations for fast motion estimation on general-purpose architectures", Proc. SPIE 3653, Visual Communications and Image Processing '99, (28 December 1998); https://doi.org/10.1117/12.334691
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KEYWORDS
Motion estimation

Binary data

Distortion

Data processing

Data storage

Quantization

Computer architecture

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