Hardware-based image processing library for Virtex FPGA

Marek Gorgon; Ryszard Tadeusiewicz

doi:10.1117/12.402510

6 October 2000 Hardware-based image processing library for Virtex FPGA

Marek Gorgon, Ryszard Tadeusiewicz

Proceedings Volume 4212, Reconfigurable Technology: FPGAs for Computing and Applications II; (2000) https://doi.org/10.1117/12.402510
Event: Information Technologies 2000, 2000, Boston, MA, United States

Abstract

The paper considers hardware-based realization of image processing algorithms. Usage of single FPGA device - Virtex as a processing element capable to carry out image processing in real-time is thoroughly discussed. For implementation of the algorithms in hardware resources specialized IP cores architectures has been designed and tested. The image-processing library consists of individual cores able to be linked together on a software level and implemented in high capacity FPGA devices is proposed.

Citation Download Citation

Marek Gorgon and Ryszard Tadeusiewicz "Hardware-based image processing library for Virtex FPGA", Proc. SPIE 4212, Reconfigurable Technology: FPGAs for Computing and Applications II, (6 October 2000); https://doi.org/10.1117/12.402510

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