Paper
4 January 2002 Highly efficient simulation environment for HDTV video decoder in VLSI design
Xun Mao, Wei Wang, Huimin Gong, Yan Li He, Jian Lou, Lu Yu, Qingdong Yao, Peter Pirsch
Author Affiliations +
Proceedings Volume 4671, Visual Communications and Image Processing 2002; (2002) https://doi.org/10.1117/12.453023
Event: Electronic Imaging, 2002, San Jose, California, United States
Abstract
With the increase of the complex of VLSI such as the SoC (System on Chip) of MPEG-2 Video decoder with HDTV scalability especially, simulation and verification of the full design, even as high as the behavior level in HDL, often proves to be very slow, costly and it is difficult to perform full verification until late in the design process. Therefore, they become bottleneck of the procedure of HDTV video decoder design, and influence it's time-to-market mostly. In this paper, the architecture of Hardware/Software Interface of HDTV video decoder is studied, and a Hardware-Software Mixed Simulation (HSMS) platform is proposed to check and correct error in the early design stage, based on the algorithm of MPEG-2 video decoding. The application of HSMS to target system could be achieved by employing several introduced approaches. Those approaches speed up the simulation and verification task without decreasing performance.
© (2002) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Xun Mao, Wei Wang, Huimin Gong, Yan Li He, Jian Lou, Lu Yu, Qingdong Yao, and Peter Pirsch "Highly efficient simulation environment for HDTV video decoder in VLSI design", Proc. SPIE 4671, Visual Communications and Image Processing 2002, (4 January 2002); https://doi.org/10.1117/12.453023
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Cited by 3 scholarly publications.
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KEYWORDS
Video

Very large scale integration

Computer architecture

Distributed interactive simulations

Device simulation

Computer simulations

Data conversion

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