Paper
28 August 2003 LEEPL mask fabrication using SOI substrates
Kenta Yotsui, Gaku Suzuki, Akira Tamura
Author Affiliations +
Abstract
We have prepared 100-mm and 200-mm 1X stencil masks for low energy electron-beam proximity projection lithography (LEEPL) using silicon on insulator (SOI) substrates. We chose 200-mm without frame type format for production mask and 100-mm with NIST-like frame type for developing. And we employed COSMOS (complementary stencil masks on strut-supports) structure proposed by SONY to suppress in-plane distortion (IPD) of membrane. Our 100-mm mask contains 70-nm node device patterns. The critical dimension (CD) uniformity of a 100-nm width line patterns was 5.6 nm in range within 20-mm square area. The CD linearity of the line patterns was 5.5 nm in range throughout the range of 80- to 300-nm width. In our 200-mm mask, 100-nm width line patterns and 150-nm width hole patterns were successfully fabricated within 46-mm square area.
© (2003) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Kenta Yotsui, Gaku Suzuki, and Akira Tamura "LEEPL mask fabrication using SOI substrates", Proc. SPIE 5130, Photomask and Next-Generation Lithography Mask Technology X, (28 August 2003); https://doi.org/10.1117/12.504250
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CITATIONS
Cited by 2 scholarly publications.
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KEYWORDS
Photomasks

Charged-particle lithography

Silicon

Critical dimension metrology

Mask making

Silicon carbide

Distortion

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