Paper
10 May 2005 In-chip overlay measurement by existing bright-field imaging optical tools
Author Affiliations +
Abstract
We have developed a target design for overlay measurement which is small enough (3x3μm) that it could be positioned within the active area of integrated circuit devices. These targets have been measured using an unmodified overlay tool. The targets are too small for the image to be fully resolved using visible wavelengths, and so measurement using the normal methods based on determining the relative positions of features in the image does not produce acceptable levels of measurement uncertainty. Instead, we show that the symmetry of the image can be used to determine the overlay error. We report initial results which show measurement uncertainty using this technique approaching the levels needed for overlay control at design rules under 100nm. These results are limited by the process used to create our test structures, and even better results may be possible with state-of-the-art lithography and processing techniques.
© (2005) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Yi-Sha Ku, Chi-Hong Tung, and Nigel P. Smith "In-chip overlay measurement by existing bright-field imaging optical tools", Proc. SPIE 5752, Metrology, Inspection, and Process Control for Microlithography XIX, (10 May 2005); https://doi.org/10.1117/12.599054
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CITATIONS
Cited by 7 scholarly publications and 3 patents.
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KEYWORDS
Overlay metrology

Semiconducting wafers

Lithography

Silicon

Optical imaging

Image resolution

Detection and tracking algorithms

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