Paper
1 July 2005 CMOS degradation effects due to electron beam lithography in smart NEMS fabrication
Francesca Campabadal, Sara Ghatnekar-Nilsson, Gemma Rius, Celeste Fleta, Joan Marc Raf, Eduard Figueras, Jaume Esteve
Author Affiliations +
Proceedings Volume 5836, Smart Sensors, Actuators, and MEMS II; (2005) https://doi.org/10.1117/12.607926
Event: Microtechnologies for the New Millennium 2005, 2005, Sevilla, Spain
Abstract
The effects of electron beam lithography for patterning to the nanoscale a polysilicon layer electrically connected to the gate of an NMOS transistor are investigated by means of the analysis of the transistor current-voltage characteristics. In order to evaluate the impact of the electron beam process, two sets of experiments are carried out. The first set consists in the assessment of the effect on the transistor when directly exposing the polysilicon layer and in the second, the impact of the complete electron beam lithography process is investigated using different acceleration voltages. The results obtained show that a severe degradation of the transistor characteristics occurs when processing at high acceleration voltages. The degradation is observed as a threshold voltage shift and a decrease in the transconductance. This behaviour can be related to positive charge trapping in the gate oxide and generation of interface states at the SiO2-Si interface. In addition unbiased room temperature annealing is found to significantly reduce or compensate the induced positive trapped charges. The results suggest that the secondary radiation created by the primary electron beam is damaging the transistor characteristics and can lead to the loss of circuit performance when using electron beam lithography to fabricate nanostructures in already processed CMOS circuits.
© (2005) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Francesca Campabadal, Sara Ghatnekar-Nilsson, Gemma Rius, Celeste Fleta, Joan Marc Raf, Eduard Figueras, and Jaume Esteve "CMOS degradation effects due to electron beam lithography in smart NEMS fabrication", Proc. SPIE 5836, Smart Sensors, Actuators, and MEMS II, (1 July 2005); https://doi.org/10.1117/12.607926
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Cited by 5 scholarly publications.
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KEYWORDS
Electron beam lithography

Transistors

Electron beams

Nanoelectromechanical systems

Nanolithography

Scanning electron microscopy

CMOS technology

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