Paper
21 March 2006 The feasibility study of KrF HT-PSM in ArF lithography process
Yeon Hwa Lim, Hong Ik Kim, Jae Sung Choi, Jeong Gun Lee
Author Affiliations +
Abstract
To print the 0.13μm logic device pattern, both KrF and ArF lithography can be used and we have two lithography processes for 0.13μm technology. In this paper, we evaluate whether ArF lithography process has enough process margin or not, when KrF HT-PSM is applied to ArF lithography processes. To estimate the feasibility of KrF HT-PSM in ArF lithography process, we simulated the change of the proximity effect according to illumination conditions and selected an optimum illumination condition. In that condition, we investigated the changes of ID bias, linearity and lineend shortening effect (LES) of minimum pattern. ID bias and CD linearity of isolated line in the ArF lithography matched well with those in KrF lithography on the optimized illumination condition. The differences of ID bias and linearity are less than 5nm. Line end CD difference between two processes is under 10nm. The ArF lithography process has enough process margins in optimized illumination condition with KrF Ht-PSM. Therefore, in the optimized illumination condition, KrF Ht-PSM can be applied to ArF lithography process to print pattern for the 0.13 μm logic device without mask revision.
© (2006) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Yeon Hwa Lim, Hong Ik Kim, Jae Sung Choi, and Jeong Gun Lee "The feasibility study of KrF HT-PSM in ArF lithography process", Proc. SPIE 6154, Optical Microlithography XIX, 61544A (21 March 2006); https://doi.org/10.1117/12.656051
Advertisement
Advertisement
RIGHTS & PERMISSIONS
Get copyright permission  Get copyright permission on Copyright Marketplace
KEYWORDS
Lithography

Lithographic illumination

Critical dimension metrology

Logic devices

Photomasks

Etching

Optical proximity correction

Back to Top