Application of integrated scatterometry measurements for a wafer-level litho feedback loop in a high-volume 300 mm DRAM production environment

Uwe Kramer; Goeran Fleischer; Thomas Marschner; Steffen Hornig; Heiko Weichert; Dave Hetzer

doi:10.1117/12.682683

15 March 2006 Application of integrated scatterometry measurements for a wafer-level litho feedback loop in a high-volume 300 mm DRAM production environment

Uwe Kramer, Goeran Fleischer, Thomas Marschner, Steffen Hornig, Heiko Weichert, Dave Hetzer

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Proceedings Volume 6155, Data Analysis and Modeling for Process Control III; 615509 (2006) https://doi.org/10.1117/12.682683
Event: SPIE 31st International Symposium on Advanced Lithography, 2006, San Jose, California, United States

Abstract

With critical dimensions in microelectronics devices shrinking to 70nm and below, CD metrology is becoming more and more critical, and additional measurement information will be needed, especially for sidewall profiles and profile height. Integrated scatterometry is, on the one hand, giving the needed measurement precision, and on the other hand, it enables more measurements than stand-alone metrology. Both high precision and large sampling are needed for future technology nodes. This paper shows results from several full volume DRAM applications of state-of-the-art technology nodes on 300 mm wafers. These applications include critical line/space (L/S) layers as 2D applications and contact-hole (CH) layers consisting of elliptical CH-like structures as critical 3D applications. The selected applications are significantly more challenging with respect to scatterometry model generation than the applications presented in previous papers [1, 2]. Simultaneously, they belong to the most critical lithography steps in DRAM manufacturing. In the experiments, the influences of both pre-processes and the litho cluster on Critical Dimension Uniformity (CDU) have been investigated. Possible impacts on Run-to-Run systems like Feed-back and Feed-forward loops will also be discussed. We show that using integrated scatterometry can significantly increase the productivity of lithography clusters.

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Uwe Kramer, Goeran Fleischer, Thomas Marschner, Steffen Hornig, Heiko Weichert, and Dave Hetzer "Application of integrated scatterometry measurements for a wafer-level litho feedback loop in a high-volume 300 mm DRAM production environment", Proc. SPIE 6155, Data Analysis and Modeling for Process Control III, 615509 (15 March 2006); https://doi.org/10.1117/12.682683

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KEYWORDS

Semiconducting wafers

Scatterometry

Lithography

Metrology

3D modeling

Critical dimension metrology

Process control

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