Paper
5 April 2007 Across-wafer CD uniformity control through lithography and etch process: experimental verification
Qiaolin Zhang, Cherry Tang, Jason Cain, Angela Hui, Tony Hsieh, Nick Maccrae, Bhanwar Singh, Kameshwar Poolla, Costas J. Spanos
Author Affiliations +
Abstract
Process variation on lot-to-lot and wafer-to-wafer level has been well addressed using R2R control in advanced process control, however, to tackle the ever increasing die-to-die (i.e. across-wafer) level process variation at the 65nm technology node and beyond, the process control must be extended into finer domain: across-wafer level. A novel model based process control approach [2] was proposed to reduce the critical dimension (CD) variation on across-wafer level. The central idea of the proposed approach is to compensate for upstream and downstream systematic CD variation by adjusting the across-wafer Post-Exposure Bake (PEB) temperature profile of a multi-zone bake plate. A temperature-to-offset model relating the PEB temperature profile of multi-zone bake plate to its heater zone offsets was constructed experimentally using wireless temperature sensors from OnWafer Technologies. The baseline post-etch CD signature and plasma etch bias signature were extracted to characterize the lithography and etch processes. And a post-etch CD variation reduction of 40% was realized in the verification experiment, which validated the efficacy of the proposed approach.
© (2007) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Qiaolin Zhang, Cherry Tang, Jason Cain, Angela Hui, Tony Hsieh, Nick Maccrae, Bhanwar Singh, Kameshwar Poolla, and Costas J. Spanos "Across-wafer CD uniformity control through lithography and etch process: experimental verification", Proc. SPIE 6518, Metrology, Inspection, and Process Control for Microlithography XXI, 65182C (5 April 2007); https://doi.org/10.1117/12.711232
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Cited by 12 scholarly publications and 1 patent.
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KEYWORDS
Etching

Critical dimension metrology

Plasma etching

Semiconducting wafers

Process control

Plasma

Lithography

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