Paper
5 April 2007 Implementation strategies and return on investment for integrated CD control
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Abstract
The advent of integrated metrology (IM) for lithography critical dimension (CD) control has been widely discussed and debated. A number of factors are pushing chip makers in the direction of IM implementation, including shrinking line widths and decreasing CD budgets, higher throughput Litho cells, escalating cost and impracticality of stand-alone CD metrology, and reducing overhead (or non value-add) time. These factors combine to make the question of IM for CD control "when" rather than "if". Scatterometry can provide a wealth of information about structures on a wafer including CD, sidewall angle, and film thickness for various layers. Although this information unquestioningly provides additional insight into the lithography process, in the end, the rate of IM implementation depends on its return on investment (ROI). In this paper, we discuss the implementation of integrated Optical Digital Profiling (iODPTM) on an advanced lithography track (Tokyo Electron CLEAN TRACK LITHIUSTM). Included are discussions of lithography trends, metrology requirements, and IM data flow and analysis. Various strategies for IM implementation are presented along with their associated ROIs.
© (2007) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Lawrence Lane and Bob Monteverde "Implementation strategies and return on investment for integrated CD control", Proc. SPIE 6518, Metrology, Inspection, and Process Control for Microlithography XXI, 651857 (5 April 2007); https://doi.org/10.1117/12.729247
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KEYWORDS
Semiconducting wafers

Metrology

Critical dimension metrology

Lithography

Process control

Scatterometry

Scanners

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