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EUV Lithography is an important technology that drives semiconductor device miniaturization. It is currently undergoing high volume manufacturing (HVM) of 3 nm logic node and development of 2 nm node by leading-edge semiconductor manufacturers. EUV mask technology is becoming increasingly important factor for EUV lithography. Mask resolution requirement is under 25nm for 2nm node Technology node. DNP has developed the EUV mask process with using the low-sensitivity-high-resolution resist and multi beam mask writer (MBMW) and This process shows promising capability on the resolution for 2nm Logic technology. For A14 Technology need more high resolution mask, In this paper, we present a comprehensive study on mask processes that possess a resolution of 20nm or below and techniques aimed at enhancing lithography contrast.
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