|
The domain of industrial automation has been of heightened interest since the introduction of robotic vision in the work place. The system discussed in this abstract is designed to be utilized in the areas of machine and robotic vision for the industrial field. It can serve as an inspection or location finding device for real-time closed loop automated systems. The performance advantage of this system is gained through the use of a massively parallel architecture. The system is built on a VLSI wafer, where the concept of a full application specific system is fabricated on a chip. These design techniques take advantage of massive parallel hardware at the lower stages of image processing, whereby increasing the performance of this stage can significantly improve the total throughput of the system. The design procedure is based on custom ASIC hardware that is optimized for the task at hand. Additionally, the elements have been designed in a modular and reusable manner. The processing of system data is accomplished, primarily, by parallel hardware units, with firmware assigned the responsibility of configuring and defining the task. This system incorporates the design theorems of image processing with the fundamentals of high speed architectures. This design technique, in conjunction with parallel processing principles, will overcome the current time limitations that have been persistent in the current approaches. The system is designed with three functional layers, each composed of parallel architectures and local control. A main control system is also present to monitor overall system functionality and issue queuing commands for the processes, in a non-blocking manner. The proposed system theory and design will be presented with the VLSI layout, simulation and modeling with the CADENCE design environment. TEst results and prototype examples are used to determine the success of the system and test its limitations.
|
