Paper
13 September 1996 Trench isolation technology for high-performance complementary bipolar devices
Kevin C. Brown, Chris Bracken, Rashid Bashir, Kulwant Egan, Joe DeSantis, Abul Ehsanul Kabir, Wipawan Yindeepol, Joel McGregor, S. J. Prasad, Reda Razouk, Victor V. Boksha, Juan C. Rey
Author Affiliations +
Abstract
A trench isolation architecture for a low voltage (< 15 V), high frequency, complementary bipolar process technology has been developed. This technology features shallow and deep trench isolation with a minimum design rule of 1.0 (mu) , along with a zero encroachment deposited field oxide. Trench etch process results suggest a mechanism whereby, depending on the amount of exposed silicon, the plasma can either be considered `silicon deficient' or `oxygen deficient.' Black silicon formation during trench etching has been eliminated with an in-situ removal of the photoresist after the hardmask oxide has been defined. Terrain isolation process simulation results are shown to be more accurate in depicting actual wafer processing structures than Tsuprem-4. Initial bipolar device characteristics are reported that illustrate the integration of the introduced PlaTOx device isolation architecture. Realized ft/fmax are 6.3/9.5 GHz for NPN, and 3.8/8.2 GHz for PNP transistors.
© (1996) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Kevin C. Brown, Chris Bracken, Rashid Bashir, Kulwant Egan, Joe DeSantis, Abul Ehsanul Kabir, Wipawan Yindeepol, Joel McGregor, S. J. Prasad, Reda Razouk, Victor V. Boksha, and Juan C. Rey "Trench isolation technology for high-performance complementary bipolar devices", Proc. SPIE 2875, Microelectronic Device and Multilevel Interconnection Technology II, (13 September 1996); https://doi.org/10.1117/12.250883
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Cited by 3 scholarly publications.
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KEYWORDS
Etching

Silicon

Oxides

Semiconducting wafers

Oxygen

Plasma

Transistors

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