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Proceedings Article

A new source optimization approach for 2X node logic

[+] Author Affiliations
Kazuya Iwase

Sony Corp. (Belgium)

Peter De Bisschop

IMEC (Belgium)

Bart Laenens, Zhipan Li, Keith Gronlund, Stephen Hsu

ASML Brion (USA)

Paul van Adrichem

ASML Brion (USA) and ASML (Netherlands)

Proc. SPIE 8166, Photomask Technology 2011, 81662A (October 13, 2011); doi:10.1117/12.898749
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From Conference Volume 8166

  • Photomask Technology 2011
  • Wilhelm Maurer; Frank E. Abboud
  • Monterey, California | September 19, 2011

abstract

Source mask optimization (SMO) and double patterning technology (DPT) are considered key Resolution Enhancement Technique (RET) enablers for scaling 2x nodes and beyond design rules, using existing 193 nm ArF technology prior to EUV availability. SMO has been extensively shown to enlarge the process margin for critical layers in memory cells and test patterns; however the best SMO flow for a large random logic area up to full-chip application has been less explored. In this study, we investigated how the mask complexity in the source optimization impacts the final process window on a random logic layout after DPT, and proposed a new source optimization approach. Example used is a contact layer for 2x logic designs. The SMO source optimization is performed using the SRAM cells with different mask complexities. These optimized sources are then evaluated based on a large-area random logic layout after mask-only optimization. CD variation through process window is used as the metric for comparison. We found the best result is obtained when the source is optimized with the full flexibility of the source and mask with freeform SRAFs and minimal MRC constraints. The source optimized with this approach can reduce CD variation through process window in the random logic without increasing its mask complexity.

© (2011) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Citation

Kazuya Iwase ; Peter De Bisschop ; Bart Laenens ; Zhipan Li ; Keith Gronlund, et al.
"A new source optimization approach for 2X node logic", Proc. SPIE 8166, Photomask Technology 2011, 81662A (October 13, 2011); doi:10.1117/12.898749; http://dx.doi.org/10.1117/12.898749


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