Paper
26 February 2007 Digital architecture for real-time processing in vision systems for control of traffic lights
Author Affiliations +
Proceedings Volume 6496, Real-Time Image Processing 2007; 64960Q (2007) https://doi.org/10.1117/12.704697
Event: Electronic Imaging 2007, 2007, San Jose, CA, United States
Abstract
Digital architecture for real time processing in vision systems for control of traffic lights is presented. The main idea of this work is to identify cars on intersections, switching traffic lights in order to reduce traffic jam. The architecture is based on a color image segmentation algorithm that comprises three stages. Stage one is a color space transformation in order to measure the color difference properly, image colors are represented in a modified L* u* v* color space. Stage two consists in a color reduction, where image colors are projected into a small set of prototypes using a self-organizing map (SOM). Stage three realizes color clustering, where simulated annealing (SA) seeks the optimal clusters from SOM prototypes. The proposed hardware architecture is implemented in a Virtex II Pro FPGA and tested; having a processing time inferior to 25ms per 128x128 pixels. The implementation comprises 262,479 equivalent gates.
© (2007) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Jair Garcia-Lamont, Jose L. Gonzalez-Vidal, and Marco Acavedo-Mosqueda "Digital architecture for real-time processing in vision systems for control of traffic lights", Proc. SPIE 6496, Real-Time Image Processing 2007, 64960Q (26 February 2007); https://doi.org/10.1117/12.704697
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KEYWORDS
Control systems

Image segmentation

Neurons

Field programmable gate arrays

RGB color model

Prototyping

Image processing

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