Self-interferometric based electrical test patterns are proposed for highly-sensitive systematic projection printing field mapping and production wafer monitoring. The strategy is to adapt the high sensitivity of Pattern-And-Interferometric-Probe monitors for aberrations to electrical testing by means of short loop and within process flow process step sequences. For this application the measurement of the presence or absence of contact sized hole in the resist in a focus-exposure matrix would be replaced by the creation of an electrical open or short in a nominally conducting minimum sized feature. Both double exposure and single exposure test patterns are presented. Detailed image simulations have been used to demonstrate the principles, create layout designs, characterize performance and compare the enhanced sensitivity relative to typical circuit layout features. Sensitivities of 8% of the clear field per 0.01λ RMS have been verified through simulation of the electrical test pattern. Layouts of these patterns have been placed on multiple-student PSM test reticles for future experimental validation.© (2006) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.