Wafer level packaging is important for MEMS to protect micromechanical structures from mechanical stresses, dusts, humidity and other contaminations. Thru Si Via etching is Key technology. In the case of ±5% of CD shift value in the etching conditions for TSV processing, the amount of volume change of thru hole in a wafer is generated about 20% at the maximum. As a result, dispersion of the density and width of Cu wiring occurs, and it leads to the increase in an error due to the margin fall of a circuit. Therefore, not only etching depth uniformity but also uniform control of CD shift is very important for TSV etching. We developed a novel deep silicone etcher "NLD-Si". This equipment has introduced the sputter system into the passivation process in the vertical etching. As a result of film coverage being controllable by optimization of this sputter condition, advanced anisotropic etching was achieved. Furthermore, by using the sputter and NLD (Magnetic Neutral Loop Discharge) plasma uniformity control system at 8 in. wafer, ±1.62% of the anisotropic etch uniformity was achieved in diameter 0.8um via and aspect ratio is above 10.© (2007) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.