Minimizing linewidth roughness for 22-nm node patterning with step-and-flash imprint lithography

Gerard M. Schmid; Niyaz Khusnatdinov; Cynthia B. Brooks; Dwayne LaBrake; Ecron Thompson; Douglas J. Resnick

doi:10.1117/12.772956

14 March 2008 Minimizing linewidth roughness for 22-nm node patterning with step-and-flash imprint lithography

Gerard M. Schmid, Niyaz Khusnatdinov, Cynthia B. Brooks, Dwayne LaBrake, Ecron Thompson, Douglas J. Resnick

Proceedings Volume 6921, Emerging Lithographic Technologies XII; 692109 (2008) https://doi.org/10.1117/12.772956
Event: SPIE Advanced Lithography, 2008, San Jose, California, United States

Abstract

Imprint lithography achieves high resolution patterning with low roughness by avoiding the tradeoff between pattern quality and process throughput - a tradeoff that limits the capability of photolithography with chemically amplified resists. This work demonstrates the use of ZEP520A electron-beam resist for fabrication of imprint masks (templates). It is shown that high resolution, low roughness patterns can be robustly transferred from imprint mask to imprint resist, and from imprint resist through etch transfer into the underlying substrate. Through improvements to the electron-beam patterning process, 22 nm half-pitch patterns are routinely achieved with linewidth roughness (LWR) of just 2.6 nm, 3σ

Citation Download Citation

Gerard M. Schmid, Niyaz Khusnatdinov, Cynthia B. Brooks, Dwayne LaBrake, Ecron Thompson, and Douglas J. Resnick "Minimizing linewidth roughness for 22-nm node patterning with step-and-flash imprint lithography", Proc. SPIE 6921, Emerging Lithographic Technologies XII, 692109 (14 March 2008); https://doi.org/10.1117/12.772956

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