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Proceedings Article

Opto-VLSI-based reconfigurable free-space optical interconnects architecture

[+] Author Affiliations
Muhsen Aljada, Kamal E. Alameh

Edith Cowan Univ. (Australia)

Yong-Tak Lee, Il-Sug Chung

Gwangju Institute of Science and Technology (South Korea)

Proc. SPIE 6414, Smart Structures, Devices, and Systems III, 64140J (January 11, 2007); doi:10.1117/12.696359
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From Conference Volume 6414

  • Smart Structures, Devices, and Systems III
  • Said F. Al-Sarawi
  • Adelaide, Australia | December 10, 2006


This paper presents a short-distance reconfigurable high-speed optical interconnects architecture employing a Vertical Cavity Surface Emitting Laser (VCSEL) array, Opto-very-large-scale-integrated (Opto-VLSI) processors, and a photodetector (PD) array. The core component of the architecture is the Opto-VLSI processor which can be driven by digital phase steering and multicasting holograms that reconfigure the optical interconnects between the input and output ports. The optical interconnects architecture is experimentally demonstrated at 2.5 Gbps using high-speed 1×3 VCSEL array and 1×3 photoreceiver array in conjunction with two 1×4096 pixel Opto-VLSI processors. The minimisation of the crosstalk between the output ports is achieved by appropriately aligning the VCSEL and PD elements with respect to the Opto-VLSI processors and driving the latter with optimal steering phase holograms.

© (2006) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

Muhsen Aljada ; Kamal E. Alameh ; Yong-Tak Lee and Il-Sug Chung
"Opto-VLSI-based reconfigurable free-space optical interconnects architecture", Proc. SPIE 6414, Smart Structures, Devices, and Systems III, 64140J (January 11, 2007); doi:10.1117/12.696359; http://dx.doi.org/10.1117/12.696359

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