This paper presents a planarization procedure using polymer films to achieve a flat CMOS surface of Readout Integrated Circuit (ROIC) for the integration between uncooled infrared focal plane arrays and ROIC. At the same time, the polymer film is also used as the sacrificial layers. After amorphous Silicon (a-Si) film was deposited using plasma enhanced chemical vapor deposition (PECVD), and patterned using inductively coupled plasma (ICP), the polymer sacrificial layer should be removed to form a-Si self-supporting micro-bridge structure. So the thickness of polymer film determine the height of the micro-bridge; the soft curing temperature determines if the contact hole can be etched by developer during the first photolithography; and the rate of dry etching determines whether the sacrificial layers of the structure can be released successfully. In this paper, the curing temperature, surface roughness, etching process of polymer films are systematically researched. On this basis, polymer film as planarization successfully reduces the 2μm height of the bumps on ROIC to less than 83 nm, over the planarized polymer mesas, bolometer arrays are fabricated. Then the polymer film as sacrificial are removed by ICP and 160x120 self-supporting micro-bridge structure arrays are successfully fabricated.© (2010) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.