Paper
5 May 2011 Variable isotropy Deep RIE process for through wafer via holes manufacturing
Dan Vasilache, Sabrina Colpo, Flavio Giacomozzi, Sabina Ronchin, Abdul Qader Ahsan Qureshi, Benno Margesin
Author Affiliations +
Proceedings Volume 8066, Smart Sensors, Actuators, and MEMS V; 80662J (2011) https://doi.org/10.1117/12.887196
Event: SPIE Microtechnologies, 2011, Prague, Czech Republic
Abstract
This paper reports a method on the manufacturing of through wafer via holes in silicon with tapered walls by Deep Reactive Ion Etching (DRIE) using the opportunity to change the isotropy in the DRIE equipments during processing. By using consecutively anisotropic and isotropic etching steps it is possible to enlarge the dimension of via holes on one side of the wafer, while on the other side dimension is set by the initial etching window. The method was used for two etching windows sizes (100μm and 20μm respectively) on 200μm and 300μm thick wafers. The aim was to manufacture tapered walls via having a good control over the walls angle. Different Bosch process recipes providing different walls roughness were used. Via holes with tapered walls (2° to 22°) were manufactured using this method. An angle deviation smaller than 10% of the manufactured via holes along the wafers was observed.
© (2011) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Dan Vasilache, Sabrina Colpo, Flavio Giacomozzi, Sabina Ronchin, Abdul Qader Ahsan Qureshi, and Benno Margesin "Variable isotropy Deep RIE process for through wafer via holes manufacturing", Proc. SPIE 8066, Smart Sensors, Actuators, and MEMS V, 80662J (5 May 2011); https://doi.org/10.1117/12.887196
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CITATIONS
Cited by 2 scholarly publications.
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KEYWORDS
Etching

Semiconducting wafers

Manufacturing

Anisotropic etching

Deep reactive ion etching

Isotropic etching

Scanning electron microscopy

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