Paper
15 October 2012 An analytical modeling approach for a gate all around (GAA) tunnel field effect transistor (TFET)
Rakhi Narang, Manoj Saxena, R. S. Gupta, Mridula Gupta
Author Affiliations +
Proceedings Volume 8549, 16th International Workshop on Physics of Semiconductor Devices; 854906 (2012) https://doi.org/10.1117/12.925534
Event: 16th International Workshop on Physics of Semiconductor Devices, 2011, Kanpur, India
Abstract
An analytical model for a gate all around (GAA) Tunnel Field Effect Transistor (TFET) having circular and square cross section geometry has been proposed in this work describing the important device electrostatic parameters i.e. Surface Potential, Electric Field and Energy Band profile. Further, the model is extended for both a p-i-n and p-n-p-n architecture keeping in view the advantages offered by a p-n-p-n architecture (also known as tunnel source or halo doped TFET) over a p-i-n based TFET. The results obtained from the model have been validated with results obtained through Silvaco ATLAS 3D device simulation software.
© (2012) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Rakhi Narang, Manoj Saxena, R. S. Gupta, and Mridula Gupta "An analytical modeling approach for a gate all around (GAA) tunnel field effect transistor (TFET)", Proc. SPIE 8549, 16th International Workshop on Physics of Semiconductor Devices, 854906 (15 October 2012); https://doi.org/10.1117/12.925534
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KEYWORDS
Gallium arsenide

Field effect transistors

3D modeling

Instrument modeling

Analytical research

Doping

Computer architecture

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