Paper
20 August 2013 Design of a system based on DSP and FPGA for video recording and replaying
Yan Kang, Heng Wang
Author Affiliations +
Proceedings Volume 8913, International Symposium on Photoelectronic Detection and Imaging 2013: Optical Storage and Display Technology; 89130E (2013) https://doi.org/10.1117/12.2032942
Event: ISPDI 2013 - Fifth International Symposium on Photoelectronic Detection and Imaging, 2013, Beijing, China
Abstract
This paper brings forward a video recording and replaying system with the architecture of Digital Signal Processor (DSP) and Field Programmable Gate Array (FPGA). The system achieved encoding, recording, decoding and replaying of Video Graphics Array (VGA) signals which are displayed on a monitor during airplanes and ships’ navigating. In the architecture, the DSP is a main processor which is used for a large amount of complicated calculation during digital signal processing. The FPGA is a coprocessor for preprocessing video signals and implementing logic control in the system. In the hardware design of the system, Peripheral Device Transfer (PDT) function of the External Memory Interface (EMIF) is utilized to implement seamless interface among the DSP, the synchronous dynamic RAM (SDRAM) and the First-In-First-Out (FIFO) in the system. This transfer mode can avoid the bottle-neck of the data transfer and simplify the circuit between the DSP and its peripheral chips. The DSP’s EMIF and two level matching chips are used to implement Advanced Technology Attachment (ATA) protocol on physical layer of the interface of an Integrated Drive Electronics (IDE) Hard Disk (HD), which has a high speed in data access and does not rely on a computer. Main functions of the logic on the FPGA are described and the screenshots of the behavioral simulation are provided in this paper. In the design of program on the DSP, Enhanced Direct Memory Access (EDMA) channels are used to transfer data between the FIFO and the SDRAM to exert the CPU’s high performance on computing without intervention by the CPU and save its time spending. JPEG2000 is implemented to obtain high fidelity in video recording and replaying. Ways and means of acquiring high performance for code are briefly present. The ability of data processing of the system is desirable. And smoothness of the replayed video is acceptable. By right of its design flexibility and reliable operation, the system based on DSP and FPGA for video recording and replaying has a considerable perspective in analysis after the event, simulated exercitation and so forth.
© (2013) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Yan Kang and Heng Wang "Design of a system based on DSP and FPGA for video recording and replaying", Proc. SPIE 8913, International Symposium on Photoelectronic Detection and Imaging 2013: Optical Storage and Display Technology, 89130E (20 August 2013); https://doi.org/10.1117/12.2032942
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KEYWORDS
Digital signal processing

Video

Field programmable gate arrays

Signal processing

Photodynamic therapy

Video coding

Video processing

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