Resist toploss modeling for OPC applications

Christian Zuniga; Yunfei Deng

doi:10.1117/12.2048124

31 March 2014 Resist toploss modeling for OPC applications

Christian Zuniga, Yunfei Deng

Proceedings Volume 9052, Optical Microlithography XXVII; 905227 (2014) https://doi.org/10.1117/12.2048124
Event: SPIE Advanced Lithography, 2014, San Jose, California, United States

Abstract

As Critical Dimension (CD) sizes decrease for 32 nm node and beyond, resist loss increases and resist patterns become more vulnerable to etching failures. Traditional OPC models only consider 2D contours and neglect height variations. Rigorous resist simulators can simulate a 3D resist profile but they are not fast enough for correction or verification on a full chip. However, resist loss for positive tone resists is mainly driven by optical intensity variations which are accurately modeled by the optical portion of an OPC model. In this article, we show that a Calibre^TM CM1 resist model can be used to determine resist loss by properly selecting the optical image plane for calibration. The model can then be used to identify toploss hotspots on a full chip and in some cases to correction of these patterns. In addition, the article will show how the model can be made more accurate by accounting for some 3D effects like diffusion through height.

Citation Download Citation

Christian Zuniga and Yunfei Deng "Resist toploss modeling for OPC applications", Proc. SPIE 9052, Optical Microlithography XXVII, 905227 (31 March 2014); https://doi.org/10.1117/12.2048124

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