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Proceedings Article

Topology and context-based pattern extraction using line-segment Voronoi diagram

[+] Author Affiliations
Sandeep K. Dey, Panagiotis Cheilaris, Evanthia Papadopoulo

Univ. della Svizzera Italiana (Switzerland)

Nathalie Casati, Maria Gabrani

IBM Research - Zürich (Switzerland)

Proc. SPIE 9427, Design-Process-Technology Co-optimization for Manufacturability IX, 942706 (March 18, 2015); doi:10.1117/12.2085547
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From Conference Volume 9427

  • Design-Process-Technology Co-optimization for Manufacturability IX
  • John L. Sturtevant; Luigi Capodieci
  • San Jose, California, United States | February 22, 2015

abstract

Early identification of problematic patterns in real designs is of great value as the lithographic simulation tools face significant timing challenges. To reduce the processing time such a tool selects only a fraction of possible patterns,which have a probable area of failure, with the risk of missing some problematic patterns. In this paper, we introduce a fast method to automatically extract patterns based on their structure and context, using the Voronoi diagram of VLSI design shapes. We first identify possible problematic locations, represented as gauge centers, and then use the derived locations to extract windows and problematic patterns from the design layout. The problematic locations are prioritized by the shape and proximity information of design polygons. We performed experiments for pattern selection in a portion of a 22nm random logic design layout. The design layout had 38584 design polygons (consisting of 199946 line-segments) on layer Mx, and 7079 markers generated by an Optical Rule Checker (ORC) tool. We verified our approach by comparing the coverage of our extracted patterns to the ORC generated markers. © (2015) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Citation

Sandeep K. Dey ; Panagiotis Cheilaris ; Nathalie Casati ; Maria Gabrani and Evanthia Papadopoulo
" Topology and context-based pattern extraction using line-segment Voronoi diagram ", Proc. SPIE 9427, Design-Process-Technology Co-optimization for Manufacturability IX, 942706 (March 18, 2015); doi:10.1117/12.2085547; http://dx.doi.org/10.1117/12.2085547


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