Paper
19 March 2015 Fin formation using graphoepitaxy DSA for FinFET device fabrication
Chi-Chun Liu, Fee Li Lie, Vinayak Rastogi, Elliott Franke, Nihar Mohanty, Richard Farrell, Hsinyu Tsai, Kafai Lai, Melih Ozlem, Wooyong Cho, Sung Gon Jung, Jay Strane, Mark Somervell, Sean Burns, Nelson Felix, Michael Guillorn, David Hetzer, Akiteru Ko, Matthew Colburn
Author Affiliations +
Abstract
A 27nm-pitch Graphoepitaxy directed self-assembly (DSA) process targeting fin formation for FinFET device fabrication is studied in a 300mm pilot line environment. The re-designed guiding pattern of graphoepitaxy DSA process determines not only the fine DSA structures but also the fin customization in parallel direction. Consequently, the critical issue of placement error is now resolved with the potential of reduction in lithography steps. However, challenges in subsequent pattern transfer are observed due to insufficient etch budget. The cause of the issues and process optimization are illustrated. Finally, silicon fins with 100nm depth in substrate with pre-determined customization is demonstrated.
© (2015) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Chi-Chun Liu, Fee Li Lie, Vinayak Rastogi, Elliott Franke, Nihar Mohanty, Richard Farrell, Hsinyu Tsai, Kafai Lai, Melih Ozlem, Wooyong Cho, Sung Gon Jung, Jay Strane, Mark Somervell, Sean Burns, Nelson Felix, Michael Guillorn, David Hetzer, Akiteru Ko, and Matthew Colburn "Fin formation using graphoepitaxy DSA for FinFET device fabrication", Proc. SPIE 9423, Alternative Lithographic Technologies VII, 94230S (19 March 2015); https://doi.org/10.1117/12.2086053
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Cited by 4 scholarly publications and 3 patents.
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KEYWORDS
Etching

Directed self assembly

Lithography

Silicon

Oxides

Atomic layer deposition

Scanning electron microscopy

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