Digital pixel readout integrated circuit architectures for LWIR

Atia Shafique; Melik Yazici; Huseyin Kayahan; Omer Ceylan; Yasar Gurbuz

doi:10.1117/12.2177551

4 June 2015 Digital pixel readout integrated circuit architectures for LWIR

Atia Shafique, Melik Yazici, Huseyin Kayahan, Omer Ceylan, Yasar Gurbuz

Proceedings Volume 9451, Infrared Technology and Applications XLI; 94510V (2015) https://doi.org/10.1117/12.2177551
Event: SPIE Defense + Security, 2015, Baltimore, MD, United States

Abstract

This paper presents and discusses digital pixel readout integrated circuit architectures for long wavelength infrared (LWIR) in CMOS technology. Presented architectures are designed for scanning and staring arrays type detectors respectively. For scanning arrays, digital time delay integration (TDI) is implemented on 8 pixels with sampling rate up to 3 using CMOS 180nm technology. Input referred noise of ROIC is below 750 rms electron meanwhile power dissipation is appreciably under 30mW. ROIC design is optimized to perform at room as well as cryogenic temperatures. For staring type arrays, a digital pixel architecture relying on coarse quantization with pulse frequency modulation (PFM) and novel approach of extended integration is presented. It can achieve extreme charge handling capacity of 2.04Ge^- with 20 bit output resolution and power dissipation below 350 nW in CMOS 90nm technology. Efficient mechanism of measuring the time to estimate the remaining charge on integration capacitor in order to achieve low SNR has employed.

Citation Download Citation

Atia Shafique, Melik Yazici, Huseyin Kayahan, Omer Ceylan, and Yasar Gurbuz "Digital pixel readout integrated circuit architectures for LWIR", Proc. SPIE 9451, Infrared Technology and Applications XLI, 94510V (4 June 2015); https://doi.org/10.1117/12.2177551

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