Design space exploration for early identification of yield limiting patterns

Helen Li; Elain Zou; Robben Lee; Sid Hong; Square Liu; JinYan Wang; Chunshan Du; Recco Zhang; Kareem Madkour; Hussein Ali; Danny Hsu; Aliaa Kabeel; Wael ElManhawy; Joe Kwan

doi:10.1117/12.2218540

16 March 2016 Design space exploration for early identification of yield limiting patterns

Helen Li, Elain Zou, Robben Lee, Sid Hong, Square Liu, JinYan Wang, Chunshan Du, Recco Zhang, Kareem Madkour, Hussein Ali, Danny Hsu, Aliaa Kabeel, Wael ElManhawy, Joe Kwan

Author Affiliations +

Proceedings Volume 9781, Design-Process-Technology Co-optimization for Manufacturability X; 97810W (2016) https://doi.org/10.1117/12.2218540
Event: SPIE Advanced Lithography, 2016, San Jose, California, United States

Abstract

In order to resolve the causality dilemma of which comes first, accurate design rules or real designs, this paper presents a flow for exploration of the layout design space to early identify problematic patterns that will negatively affect the yield.

A new random layout generating method called Layout Schema Generator (LSG) is reported in this paper, this method generates realistic design-like layouts without any design rule violation. Lithography simulation is then used on the generated layout to discover the potentially problematic patterns (hotspots). These hotspot patterns are further explored by randomly inducing feature and context variations to these identified hotspots through a flow called Hotspot variation Flow (HSV). Simulation is then performed on these expanded set of layout clips to further identify more problematic patterns.

These patterns are then classified into design forbidden patterns that should be included in the design rule checker and legal patterns that need better handling in the RET recipes and processes.

Citation Download Citation

Helen Li, Elain Zou, Robben Lee, Sid Hong, Square Liu, JinYan Wang, Chunshan Du, Recco Zhang, Kareem Madkour, Hussein Ali, Danny Hsu, Aliaa Kabeel, Wael ElManhawy, and Joe Kwan "Design space exploration for early identification of yield limiting patterns", Proc. SPIE 9781, Design-Process-Technology Co-optimization for Manufacturability X, 97810W (16 March 2016); https://doi.org/10.1117/12.2218540

ACCESS THE FULL ARTICLE

INSTITUTIONAL
Select your institution to access the SPIE Digital Library.

SELECT YOUR INSTITUTION

PERSONAL
Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.

PERSONAL SIGN IN

No SPIE Account? Create one

PURCHASE THIS CONTENT

SUBSCRIBE TO DIGITAL LIBRARY

50 downloads per 1-year subscription

Members: $195

Non-members: $335 ADD TO CART

25 downloads per 1 - year subscription

Members: $145

Non-members: $250 ADD TO CART

PURCHASE SINGLE ARTICLE

Includes PDF, HTML & Video, when available