Paper
21 March 2016 3D-ICs created using oblique processing
Author Affiliations +
Abstract
This paper demonstrates that another class of three-dimensional integrated circuits (3D-ICs) exists, distinct from through silicon via centric and monolithic 3D-ICs. Furthermore, it is possible to create devices that are 3D at the device level (i.e. with active channels oriented in each of the three coordinate axes), by performing standard CMOS fabrication operations at an angle with respect to the wafer surface into high aspect ratio silicon substrates using membrane projection lithography (MPL). MPL requires only minimal fixturing changes to standard CMOS equipment, and no change to current state-of-the-art lithography. Eliminating the constraint of 2D planar device architecture enables a wide range of new interconnect topologies which could help reduce interconnect resistance/capacitance, and potentially improve performance.
© (2016) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
D. Bruce Burckel "3D-ICs created using oblique processing", Proc. SPIE 9779, Advances in Patterning Materials and Processes XXXIII, 97790N (21 March 2016); https://doi.org/10.1117/12.2218696
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KEYWORDS
Silicon

Transistors

Metals

Capacitance

Spine

Semiconducting wafers

Etching

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