Paper
22 March 2016 High throughput Jet and Flash Imprint Lithography for semiconductor memory applications
Wei Zhang, Brian Fletcher, Ecron Thompson, Weijun Liu, Tim Stachowiak, Niyaz Khusnatdinov, J. W. Irving, Whitney Longsine, Matthew Traub, Van Truskett, Dwayne LaBrake, Zhengmao Ye
Author Affiliations +
Abstract
Imprint lithography has been shown to be an effective technique for replication of nano-scale features. Jet and Flash* Imprint Lithography (J-FIL*) involves the field-by-field deposition and exposure of a low viscosity resist deposited by jetting technology onto the substrate. The patterned mask is lowered into the fluid which then quickly flows into the relief patterns in the mask by capillary action. Following this filling step, the resist is crosslinked under UV radiation, and then the mask is removed, leaving a patterned resist on the substrate. There are two critical components to meeting throughput requirements for imprint lithography. Using a similar approach to what is already done for many deposition and etch processes, imprint stations can be clustered to enhance throughput. The FPA-1200NZ2C is a four station cluster system designed for high volume manufacturing. For a single station, throughput includes overhead, resist dispense, resist fill time (or spread time), exposure and separation. Resist exposure time and mask/wafer separation are well understood processing steps with typical durations on the order of 0.10 to 0.20 seconds. To achieve a total process throughput of 15 wafers per hour (wph) for a single station, it is necessary to complete the fluid fill step in 1.5 seconds. For a throughput of 20 wph, fill time must be reduced to only one second. There are several parameters that can impact resist filling. Key parameters include resist drop volume (smaller is better), system controls (which address drop spreading after jetting), Design for Imprint or DFI (to accelerate drop spreading) and material engineering (to promote wetting between the resist and underlying adhesion layer). In addition, it is mandatory to maintain fast filling, even for edge field imprinting. In this paper, we address the improvements made in all of these parameters to enable a 1.50 second filling process for a sub-20nm device like pattern and have demonstrated this capability for both full fields and edge fields.
© (2016) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Wei Zhang, Brian Fletcher, Ecron Thompson, Weijun Liu, Tim Stachowiak, Niyaz Khusnatdinov, J. W. Irving, Whitney Longsine, Matthew Traub, Van Truskett, Dwayne LaBrake, and Zhengmao Ye "High throughput Jet and Flash Imprint Lithography for semiconductor memory applications", Proc. SPIE 9777, Alternative Lithographic Technologies VIII, 97770A (22 March 2016); https://doi.org/10.1117/12.2219161
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Cited by 8 scholarly publications.
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KEYWORDS
Semiconducting wafers

Control systems design

Ultraviolet radiation

Etching

Photoresist processing

Semiconductors

Manufacturing

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