3D through silicon via profile metrology based on spectroscopic reflectometry for SOI applications

O. Fursenko; J. Bauer; S. Marschmeyer

doi:10.1117/12.2227651

26 April 2016 3D through silicon via profile metrology based on spectroscopic reflectometry for SOI applications

O. Fursenko, J. Bauer, S. Marschmeyer

Proceedings Volume 9890, Optical Micro- and Nanometrology VI; 989015 (2016) https://doi.org/10.1117/12.2227651
Event: SPIE Photonics Europe, 2016, Brussels, Belgium

Abstract

Through-silicon via (TSV) technology is a key feature for 3D circuit integration. TSVs are formed by etching a vertical via and filling them with a conductive material for creation of interconnections which go through the silicon or silicon-on-insulator (SOI) wafer. The Bosch etch process on Deep Reactive Ion Etching (DRIE) is commonly used for this purpose. The etch profile defined by the critical dimensions (CDs) at the top and at the bottom, by the depth and by the scallop size on the sidewall needs to be monitored and well controlled.

In this work a nondestructive 3D metrology of deeply-etched structures with an aspect ratio of more than 10 and patterns with lateral dimensions from 2 to 7 μm in SOI wafer is proposed. Spectroscopic reflectometry in the spectral range of 250-800 nm using a production metrology tool was applied. The depth determinations based on different algorithms are compared.

The Pearson correlation coefficient between measured and calculated reflection is suggested as the most appropriate method. A simple method for top CD evaluation is proposed by the measurement of reflection and using the polynomial approximation of reflection versus TSV filling coefficient which is determined as ratio of CD to pitch. The 3D RCWA simulations confirm this dependence.

Citation Download Citation

O. Fursenko, J. Bauer, and S. Marschmeyer "3D through silicon via profile metrology based on spectroscopic reflectometry for SOI applications", Proc. SPIE 9890, Optical Micro- and Nanometrology VI, 989015 (26 April 2016); https://doi.org/10.1117/12.2227651

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KEYWORDS

Semiconducting wafers

Etching

Reflectance spectroscopy

Silicon

3D metrology

Metrology

Scanning electron microscopy

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