Achieving ultra-high temperatures with a resistive emitter array

Tom Danielson; Greg Franks; Nicholas Holmes; Joe LaVeigne; Greg Matis; Steve McHugh; Dennis Norton; Tony Vengel; John Lannon; Scott Goodwin

doi:10.1117/12.2225856

3 May 2016 Achieving ultra-high temperatures with a resistive emitter array

Tom Danielson, Greg Franks, Nicholas Holmes, Joe LaVeigne, Greg Matis, Steve McHugh, Dennis Norton, Tony Vengel, John Lannon, Scott Goodwin

Author Affiliations +

Proceedings Volume 9820, Infrared Imaging Systems: Design, Analysis, Modeling, and Testing XXVII; 98200Z (2016) https://doi.org/10.1117/12.2225856
Event: SPIE Defense + Security, 2016, Baltimore, MD, United States

Abstract

The rapid development of very-large format infrared detector arrays has challenged the IR scene projector community to also develop larger-format infrared emitter arrays to support the testing of systems incorporating these detectors. In addition to larger formats, many scene projector users require much higher simulated temperatures than can be generated with current technology in order to fully evaluate the performance of their systems and associated processing algorithms. Under the Ultra High Temperature (UHT) development program, Santa Barbara Infrared Inc. (SBIR) is developing a new infrared scene projector architecture capable of producing both very large format (>1024 x 1024) resistive emitter arrays and improved emitter pixel technology capable of simulating very high apparent temperatures. During earlier phases of the program, SBIR demonstrated materials with MWIR apparent temperatures in excess of 1400 K. New emitter materials have subsequently been selected to produce pixels that achieve even higher apparent temperatures. Test results from pixels fabricated using the new material set will be presented and discussed. A 'scalable' Read In Integrated Circuit (RIIC) is also being developed under the same UHT program to drive the high temperature pixels. This RIIC will utilize through-silicon via (TSV) and Quilt Packaging (QP) technologies to allow seamless tiling of multiple chips to fabricate very large arrays, and thus overcome the yield limitations inherent in large-scale integrated circuits. Results of design verification testing of the completed RIIC will be presented and discussed.

Citation Download Citation

Tom Danielson, Greg Franks, Nicholas Holmes, Joe LaVeigne, Greg Matis, Steve McHugh, Dennis Norton, Tony Vengel, John Lannon, and Scott Goodwin "Achieving ultra-high temperatures with a resistive emitter array", Proc. SPIE 9820, Infrared Imaging Systems: Design, Analysis, Modeling, and Testing XXVII, 98200Z (3 May 2016); https://doi.org/10.1117/12.2225856

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