FPGA based hardware optimized implementation of signal processing system for LFM pulsed radar

Noor ul Azim; Wang Jun

doi:10.1117/12.2247931

3 November 2016 FPGA based hardware optimized implementation of signal processing system for LFM pulsed radar

Noor ul Azim, Wang Jun

Proceedings Volume 10030, Infrared, Millimeter-Wave, and Terahertz Technologies IV; 100302U (2016) https://doi.org/10.1117/12.2247931
Event: SPIE/COS Photonics Asia, 2016, Beijing, China

Abstract

Signal processing is one of the main parts of any radar system. Different signal processing algorithms are used to extract information about different parameters like range, speed, direction etc, of a target in the field of radar communication. This paper presents LFM (Linear Frequency Modulation) pulsed radar signal processing algorithms which are used to improve target detection, range resolution and to estimate the speed of a target. Firstly, these algorithms are simulated in MATLAB to verify the concept and theory. After the conceptual verification in MATLAB, the simulation is converted into implementation on hardware using Xilinx FPGA. Chosen FPGA is Xilinx Virtex-6 (XC6LVX75T). For hardware implementation pipeline optimization is adopted and also other factors are considered for resources optimization in the process of implementation. Focusing algorithms in this work for improving target detection, range resolution and speed estimation are hardware optimized fast convolution processing based pulse compression and pulse Doppler processing.

Citation Download Citation

Noor ul Azim and Wang Jun "FPGA based hardware optimized implementation of signal processing system for LFM pulsed radar", Proc. SPIE 10030, Infrared, Millimeter-Wave, and Terahertz Technologies IV, 100302U (3 November 2016); https://doi.org/10.1117/12.2247931

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