As the semiconductor industry continues to strive towards high volume manufacturing for EUV, flatness specifications for photomasks have decreased to below 10nm for 2018 production, however the current champion masks being produced report P-V flatness values of roughly ~50nm. Write compensation presents the promising opportunity to mitigate pattern placement errors through the use of geometrically adjusted target patterns which counteract the reticle’s flatness induced distortions and address the differences in chucking mechanisms between e-beam write and electrostatic clamping during scan. Compensation relies on high accuracy flatness data which provides the critical topographical components of the reticle to the write tool. Any errors included in the flatness data file are translated to the pattern during the write process, which has now driven flatness measurement tools to target a 6σ reproducibility <1nm. Using data collected from a 2011 Sematech study on the Alpha Demo Tool, the proposed methodology for write compensation is validated against printed wafer results.
Topographic features which lack compensation capability must then be held to stringent specifications in order to limit their contributions to the final image placement error (IPE) at wafer. By understanding the capabilities and limitations of write compensation, it is then possible to shift flatness requirements towards the “non-correctable” portion of the reticle’s profile, potentially relieving polishers from having to adhere to the current single digit flatness specifications.
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Katherine Ballman ; Christopher Lee ; John Zimmerman ; Thomas Dunn and Alexander Bean
Evaluation of photomask flatness compensation for extreme ultraviolet lithography
", Proc. SPIE 9985, Photomask Technology 2016, 99850N (November 17, 2016); doi:10.1117/12.2240956; http://dx.doi.org/10.1117/12.2240956