Paper
22 February 2017 A high performance multi-tap CMOS lock-in pixel image sensor for biomedical applications
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Abstract
We have developed and evaluated the large full well capacity (FWC) for wide signal detection range and low temporal noise for high sensitivity lock-in pixel CMOS image sensor (CIS) embedded with two storage-diodes (SDs). In addition, for fast charge transfer from photodiode (PD) to SDs, a lateral electric field charge modulator (LEFM) is used for the developed lock-in pixel. As a result, the time-resolved CIS achieves a very large FWC of approximately 7000e-, low temporal random noise of 1.17e-rms at 45fps with true correlated double sampling (CDS) operation, and fast intrinsic response less than 500ps at 635nm. The proposed imager has an effective pixel array of 128(H)×256(V) and a pixel size of 11.2×11.2μm2. The sensor chip is fabricated by a Dongbu HiTek 1P4M 0.11μm CIS process.
© (2017) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Min-Woong Seo, Yuya Shirakawa, Keiichiro Kagawa, Keita Yasutomi, and Shoji Kawahito "A high performance multi-tap CMOS lock-in pixel image sensor for biomedical applications", Proc. SPIE 10076, High-Speed Biomedical Imaging and Spectroscopy: Toward Big Data Instrumentation and Management II, 100760V (22 February 2017); https://doi.org/10.1117/12.2255951
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Cited by 1 scholarly publication.
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KEYWORDS
Imaging systems

Signal to noise ratio

Biomedical optics

CMOS sensors

Sensors

Modulators

Prototyping

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