Paper
24 March 2017 Comprehensive analysis of line-edge and line-width roughness for EUV lithography
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Abstract
Pattern transfer fidelity is always a major challenge for any lithography process and needs continuous improvement. Lithographic processes in semiconductor industry are primarily driven by optical imaging on photosensitive polymeric material (resists). Quality of pattern transfer can be assessed by quantifying multiple parameters such as, feature size uniformity (CD), placement, roughness, sidewall angles etc. Roughness in features primarily corresponds to variation of line edge or line width and has gained considerable significance, particularly due to shrinking feature sizes and variations of features in the same order. This has caused downstream processes (Etch (RIE), Chemical Mechanical Polish (CMP) etc.) to reconsider respective tolerance levels. A very important aspect of this work is relevance of roughness metrology from pattern formation at resist to subsequent processes, particularly electrical validity. A major drawback of current LER/LWR metric (sigma) is its lack of relevance across multiple downstream processes which effects material selection at various unit processes. In this work we present a comprehensive assessment of Line Edge and Line Width Roughness at multiple lithographic transfer processes. To simulate effect of roughness a pattern was designed with periodic jogs on the edges of lines with varying amplitudes and frequencies. There are numerous methodologies proposed to analyze roughness and in this work we apply them to programmed roughness structures to assess each technique’s sensitivity. This work also aims to identify a relevant methodology to quantify roughness with relevance across downstream processes.
© (2017) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Ravi Bonam, Chi-Chun Liu, Mary Breton, Stuart Sieg, Indira Seshadri, Nicole Saulnier, Jeffrey Shearer, Raja Muthinti, Raghuveer Patlolla, and Huai Huang "Comprehensive analysis of line-edge and line-width roughness for EUV lithography", Proc. SPIE 10143, Extreme Ultraviolet (EUV) Lithography VIII, 101431A (24 March 2017); https://doi.org/10.1117/12.2258194
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KEYWORDS
Photomasks

Semiconducting wafers

Line edge roughness

Line width roughness

Photoresist processing

Edge roughness

Etching

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