Design technology co-optimization (DTCO) study on self-aligned-via (SAV) with Lamella DSA for sub-7 nm technology

Yuansheng Ma; Jongwook Kye; Gurdaman S. Khaira; Le Hong; James Word; Yuyang Sun; Joydeep Mitra; J. Andres Torres; Germain Fenger; Harry J. Levinson

doi:10.1117/12.2258056

30 March 2017 Design technology co-optimization (DTCO) study on self-aligned-via (SAV) with Lamella DSA for sub-7 nm technology

Yuansheng Ma, Jongwook Kye, Gurdaman S. Khaira, Le Hong, James Word, Yuyang Sun, Joydeep Mitra, J. Andres Torres, Germain Fenger, Harry J. Levinson

Author Affiliations +

Proceedings Volume 10148, Design-Process-Technology Co-optimization for Manufacturability XI; 101480B (2017) https://doi.org/10.1117/12.2258056
Event: SPIE Advanced Lithography, 2017, San Jose, California, United States

Abstract

In this paper, we present a design technology co-optimization (DTCO) flow to pattern self-aligned via (SAV) using two masks with grapho-epitaxy of lamella BCP and 193i for sub-7nm design. We show that it is necessary to consider both metal and via layers at the same time in creating design rules with process variations. Due to lamella DSA’s own characteristics, it can be easily applied in dense memory or SRAM applications for SAV patterning using traditional single-material metal hard mask. However, to achieve two-mask SAV solution for logic applications, we need to apply alternating hard mask in metal to cut lamella DSA patterns without compromising the technology scaling.

Conference Presentation

Citation Download Citation

Yuansheng Ma, Jongwook Kye, Gurdaman S. Khaira, Le Hong, James Word, Yuyang Sun, Joydeep Mitra, J. Andres Torres, Germain Fenger, and Harry J. Levinson "Design technology co-optimization (DTCO) study on self-aligned-via (SAV) with Lamella DSA for sub-7 nm technology", Proc. SPIE 10148, Design-Process-Technology Co-optimization for Manufacturability XI, 101480B (30 March 2017); https://doi.org/10.1117/12.2258056

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