Rapid prototyping of SoC-based real-time vision system: application to image preprocessing and face detection

Maher Jridi; Ayman Alfalou

doi:10.1117/12.2264712

1 May 2017 Rapid prototyping of SoC-based real-time vision system: application to image preprocessing and face detection

Maher Jridi, Ayman Alfalou

Author Affiliations +

Proceedings Volume 10203, Pattern Recognition and Tracking XXVIII; 102030M (2017) https://doi.org/10.1117/12.2264712
Event: SPIE Defense + Security, 2017, Anaheim, CA, United States

Abstract

By this paper, the major goal is to investigate the Multi-CPU/FPGA SoC (System on Chip) design flow and to transfer a know-how and skills to rapidly design embedded real-time vision system. Our aim is to show how the use of these devices can be benefit for system level integration since they make possible simultaneous hardware and software development. We take the facial detection and pretreatments as case study since they have a great potential to be used in several applications such as video surveillance, building access control and criminal identification. The designed system use the Xilinx Zedboard platform. The last is the central element of the developed vision system. The video acquisition is performed using either standard webcam connected to the Zedboard via USB interface or several camera IP devices. The visualization of video content and intermediate results are possible with HDMI interface connected to HD display. The treatments embedded in the system are as follow: (i) pre-processing such as edge detection implemented in the ARM and in the reconfigurable logic, (ii) software implementation of motion detection and face detection using either ViolaJones or LBP (Local Binary Pattern), and (iii) application layer to select processing application and to display results in a web page. One uniquely interesting feature of the proposed system is that two functions have been developed to transmit data from and to the VDMA port. With the proposed optimization, the hardware implementation of the Sobel filter takes 27 ms and 76 ms for 640x480, and 720p resolutions, respectively. Hence, with the FPGA implementation, an acceleration of 5 times is obtained which allow the processing of 37 fps and 13 fps for 640x480, and 720p resolutions, respectively.

Conference Presentation

Citation Download Citation

Maher Jridi and Ayman Alfalou "Rapid prototyping of SoC-based real-time vision system: application to image preprocessing and face detection", Proc. SPIE 10203, Pattern Recognition and Tracking XXVIII, 102030M (1 May 2017); https://doi.org/10.1117/12.2264712

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